CH32V003

Runs real compiled WCH CH32V003 firmware on an in-browser QingKe RISC-V RV32EC core (RV32E + the C compressed extension, 48 MHz, 16 KB flash, 2 KB SRAM) — the site's first RISC-V microcontroller. The default is "Blink PD0": a bare-metal C program that enables the GPIOD clock in RCC, configures PD0 as an output and blinks the on-board user LED with the atomic BSHR/BCR set/reset registers. "SysTick Blink" blinks the same LED but times it with the SysTick (STK) 32-bit counter instead of a busy loop — it programs STK_CMP, enables the counter and polls the compare flag (STK_SR). "USART Hello" brings up USART1 (TX on PD5) and prints a greeting to the serial console while blinking the LED each line; "USART Counter" prints an incrementing counter over USART1. All four are original CC0 programs compiled with clang for rv32ec (the real CH32V003 has no hardware multiply, so multiplies become shift/add). Open the debugger, or add ?debug, to single-STEP real RISC-V instructions from flash at 0x00000000, set PC breakpoints and write watchpoints, and read the RV32EC registers (x0-x15 with ABI names + pc + the machine CSRs mstatus/mtvec/mepc/mcause) and the real CH32V003 memory map live (FLASH 0x00000000, SRAM 0x20000000, peripherals 0x40000000). A bare CH32V003 has no user input wired to the firmware and no on-board speaker, so it is honestly silent with no input pad.

Runs real compiled WCH CH32V003 firmware on an in-browser QingKe RISC-V RV32EC core (RV32E + the C compressed extension, 48 MHz, 16 KB flash, 2 KB SRAM) — the site's first RISC-V microcontroller. The default is "Blink PD0": a bare-metal C program that enables the GPIOD clock in RCC, configures PD0 as an output and blinks the on-board user LED with the atomic BSHR/BCR set/reset registers. "SysTick Blink" blinks the same LED but times it with the SysTick (STK) 32-bit counter instead of a busy loop — it programs STK_CMP, enables the counter and polls the compare flag (STK_SR). "USART Hello" brings up USART1 (TX on PD5) and prints a greeting to the serial console while blinking the LED each line; "USART Counter" prints an incrementing counter over USART1. All four are original CC0 programs compiled with clang for rv32ec (the real CH32V003 has no hardware multiply, so multiplies become shift/add). Open the debugger, or add ?debug, to single-STEP real RISC-V instructions from flash at 0x00000000, set PC breakpoints and write watchpoints, and read the RV32EC registers (x0-x15 with ABI names + pc + the machine CSRs mstatus/mtvec/mepc/mcause) and the real CH32V003 memory map live (FLASH 0x00000000, SRAM 0x20000000, peripherals 0x40000000). A bare CH32V003 has no user input wired to the firmware and no on-board speaker, so it is honestly silent with no input pad.

Runs real compiled WCH CH32V003 firmware on an in-browser QingKe RISC-V RV32EC core (RV32E + the C compressed extension, 48 MHz, 16 KB flash, 2 KB SRAM) — the site's first RISC-V microcontroller. The default is "Blink PD0": a bare-metal C program that enables the GPIOD clock in RCC, configures PD0 as an output and blinks the on-board user LED with the atomic BSHR/BCR set/reset registers. "SysTick Blink" blinks the same LED but times it with the SysTick (STK) 32-bit counter instead of a busy loop — it programs STK_CMP, enables the counter and polls the compare flag (STK_SR). "USART Hello" brings up USART1 (TX on PD5) and prints a greeting to the serial console while blinking the LED each line; "USART Counter" prints an incrementing counter over USART1. All four are original CC0 programs compiled with clang for rv32ec (the real CH32V003 has no hardware multiply, so multiplies become shift/add). Open the debugger, or add ?debug, to single-STEP real RISC-V instructions from flash at 0x00000000, set PC breakpoints and write watchpoints, and read the RV32EC registers (x0-x15 with ABI names + pc + the machine CSRs mstatus/mtvec/mepc/mcause) and the real CH32V003 memory map live (FLASH 0x00000000, SRAM 0x20000000, peripherals 0x40000000). A bare CH32V003 has no user input wired to the firmware and no on-board speaker, so it is honestly silent with no input pad.

Runs real compiled WCH CH32V003 firmware on an in-browser QingKe RISC-V RV32EC core (RV32E + the C compressed extension, 48 MHz, 16 KB flash, 2 KB SRAM) — the site's first RISC-V microcontroller. The default is "Blink PD0": a bare-metal C program that enables the GPIOD clock in RCC, configures PD0 as an output and blinks the on-board user LED with the atomic BSHR/BCR set/reset registers. "SysTick Blink" blinks the same LED but times it with the SysTick (STK) 32-bit counter instead of a busy loop — it programs STK_CMP, enables the counter and polls the compare flag (STK_SR). "USART Hello" brings up USART1 (TX on PD5) and prints a greeting to the serial console while blinking the LED each line; "USART Counter" prints an incrementing counter over USART1. All four are original CC0 programs compiled with clang for rv32ec (the real CH32V003 has no hardware multiply, so multiplies become shift/add). Open the debugger, or add ?debug, to single-STEP real RISC-V instructions from flash at 0x00000000, set PC breakpoints and write watchpoints, and read the RV32EC registers (x0-x15 with ABI names + pc + the machine CSRs mstatus/mtvec/mepc/mcause) and the real CH32V003 memory map live (FLASH 0x00000000, SRAM 0x20000000, peripherals 0x40000000). A bare CH32V003 has no user input wired to the firmware and no on-board speaker, so it is honestly silent with no input pad.