Whirlwind I

Embedding

The emulator is two small, self-contained pieces: a pure MIT Whirlwind I processor (whirlwind.js) and a CRT-point-display canvas (whirlwind-screen.js). Vendor both and drive the machine from your own loop. The core never touches the DOM, so the debugger can pause, step and breakpoint it. A Whirlwind word is 16 bits, which fits a JavaScript integer, so no BigInt is needed — but the arithmetic is ones-complement and every number is a fraction in (−1, +1):

var cpu = new Whirlwind({ onPoint: function (x, y) { scope.plot(x, y); } });
cpu.load(image, 0o40);   // image = { addr: word }, start PC = 040
while (!cpu.halted) cpu.step();   // step() = one Whirlwind instruction

The machine is plain objects. Everything the debugger needs is a live field or method on the core:

Because the CPU and core store are ordinary JavaScript, breakpoints and watchpoints are host-side checks around cpu.step() and cpu.wr(), with no changes to the core.

Debugger integration

The boot shim publishes window.EMU_BOOT with a full transport: pause / resume / isPaused, stepInsn(n) (one instruction) and step(n) (a burst), reset, plus breakpoints (program-counter values the loop checks before each step) and watchpoints (core addresses, checked inside the write path). A dedicated CPU decoder, /debugger/src/cpus/whirlwind.js, disassembles each word into the native Whirlwind mnemonics in octal: the I/O group (si bi rd bo rc sd cf), the transfers (ts td ta ck ab ex), the branches (cp sp), add / subtract (ca cs ad su cm sa ao dm), multiply / divide (mr mh dv) and the shifts (sl sr sf cl md).

The core store is 2048 sixteen-bit words. It is exposed to the shared views as a 2-bytes-per-word chip (byte 2n = low 8 bits, byte 2n+1 = high 8 bits of word n), so every instruction is length two and the disassembler assembles words with arithmetic. The register plug-in returns a byte-scaled pc() so the disassembly gutter, the program-counter highlight and breakpoints all line up on word boundaries. AC / AR / BR are shown as 16-bit words and the flags OV (arithmetic overflow), DV (divide error), CK (check) and RUN as chips.

Architecture

MIT's Whirlwind I, first fully operational in 1951, is one of the most important machines in computing history. Built for the U.S. Navy as a real-time flight-simulator / aircraft-stability computer, it became the first digital computer designed to operate in real time, the first to use magnetic-core memory (Jay Forrester's invention, which replaced its unreliable storage tubes), and the first with an interactive CRT point-plotting display operated with a light gun. Its ideas fed directly into the SAGE air-defence network. This build is a from-scratch processor authored for emulators.org.

• 16-bit words, single address. Each instruction is one word: a 5-bit operation code (the most-significant five bits, with bit 0 the sign bit) and an 11-bit address, giving 2048 words of core. There is no index register in the base machine — addresses are absolute.
• Ones-complement fractional arithmetic. Whirlwind treats every 16-bit word as a fraction in (−1, +1); addition uses an end-around carry, and there are two zeroes (+0 and −0). ca clears-and-adds into AC, cs clears-and-subtracts, ad/su accumulate, mr/mh multiply (leaving a double-length product in AC:BR), dv divides, and sf scale-factors. The sa "special add" preserves overflow in the one-bit SAM register for multiple-precision work.
• The CRT point display. To plot a point the program puts the vertical deflection in AC and issues si 0o600 (select the point display, which latches the vertical), then puts the horizontal deflection in AC and issues rc (record) to light the spot. Plotting the same moving spot over and over, against the phosphor's glow-and-fade, is exactly how the bouncing-ball demonstration worked.

Two authored, public-domain programs are assembled inline in genuine Whirlwind machine code. Bouncing ball integrates a ball under gravity (semi-implicit Euler: su the gravity constant from the velocity, ad the velocity to the position), reflects it off the floor and ceiling by negating the velocity with cs, drifts it across the tube and wraps it, and reads a "kick" impulse the console keys write into a flip-flop test register — a live, interactive re-creation of the R-196 (June 1951) demonstration. Parabola sweeps x across the tube and plots y = x² − ½, driving the fractional multiplier mr. The shared whirlwind decoder turns each word back into these mnemonics so you can watch the fetch-decode-execute cycle — and the ones-complement multiplier at work — one instruction at a time.