STM8S-Discovery

Embedding

There is no upstream runtime to vendor here — the STM8 is written from scratch as three plain-global JavaScript modules, loaded in order:

// 1. the assembled firmware, 2. the chip core, 3. the debugger plug-in
<script src="firmware.js"></script>             // window.STM8_FW: original CC0 programs, real STM8 bytes
<script src="stm8.js"></script>                 // window.STM8: the STM8S105 SoC + Discovery board
<script src="stm8s-discovery-debug.js"></script> // EmuKit.defineMachine(...)

Boot. Construct the chip on a <canvas>, load a firmware image (the raw bytes, including the reset-vector table) and run your own loop. One frame is a burst of instructions; you own it, so the debugger can pause and step it:

var chip = new STM8(canvas, STM8_FW.blink, { speed: 40000 });
(function loop(){
  var hit = chip.run(chip.speed, bps); // bps = breakpoint Set (PC addresses)
  chip.render();
  if (!hit) requestAnimationFrame(loop);
})();

Debugger integration

The debugger plug-in (stm8s-discovery-debug.js) reads window.EMU_BOOT and calls EmuKit.defineMachine. Because the whole chip is ordinary JavaScript, single-stepping is just chip.stepInsn(), registers are read and written straight off chip.A / chip.X / chip.Y / chip.SP / chip.PC / chip.CC with the V/I1/H/I0/N/Z/C flags decoded from CC, and execution breakpoints are a host-side Set the loop checks against the program counter at each instruction boundary. Write watchpoints wrap the memory write path and pause when a watched byte address is written.

A new stm8 disassembler (/debugger/src/cpus/stm8.js) decodes the variable-length, big-endian STM8 encoding — the ALU / load group (LD, LDW, ADD, SUB, CP, CPW, AND, XOR, …) with its addressing modes, the single-operand ops (INC, DEC, CLR, TNZ, SWAP, the shifts and the word forms), the relative branches and the four prefix bytes 0x72 (bit ops BSET/BRES/BTJT/BTJF and longmem forms), 0x90 (index on Y), 0x91 and 0x92 (indirect) — so instructions decode to their real 1–5-byte lengths from the flash at 0x8000.

Architecture

The STM8 is STMicroelectronics' 8-bit CISC microcontroller core; the STM8S-Discovery is the low-cost evaluation board carrying an STM8S105. This emulator is a from-scratch model of the whole chip:

• STM8 CPU — an 8-bit accumulator A, two 16-bit index registers X and Y, a 16-bit stack pointer SP, the program counter PC and the condition-code register CC (V, I1, H, I0, N, Z, C). The variable-length CISC instruction set with immediate, short/long direct, indexed (no / short / long offset), indirect, relative and bit-test-and-jump addressing, and the four prefix bytes 0x72, 0x90, 0x91, 0x92.
• Memory map — the real STM8S105 layout in one big-endian 64 KB space: 2 KB of RAM at 0x0000, the peripheral registers at 0x5000, and up to 32 KB of flash at 0x8000. The reset vector at 0x8000 (a 0x82 opcode byte then a 24-bit start address) seeds the PC.
• Digital I/O — the GPIO ports PA..PF with their ODR/IDR/DDR/CR1/CR2 registers. The on-board green LED LD1 is on PD0; the user / touch key is modelled as an active-low button on PB7.
• TIM4 — the 8-bit basic timer, with its prescaler and auto-reload, setting the update flag (UIF) in TIM4_SR.
• UART2 — the board's serial link. Every byte written to UART2_DR is captured onto the on-screen serial console; the TXE transmit-ready flag stays set so real polling transmit code runs.
• Content — four original CC0 hand-assembled STM8 programs: Blink LED, Button toggles LED, Timer blink, and UART hello + counter. No third-party firmware.
• Honest limits. The STM8S-Discovery has no on-board audio, so this emulator is silent by design. Interrupt delivery is not modelled (the bundled firmware polls); the clock tree, ADC, SPI/I2C, the touch-sensing acquisition and flash self-programming are not modelled, and the user key stands in for the board's touch key. Everything the bundled firmware exercises — the full instruction execution with all addressing modes and prefixes, digital I/O, TIM4 and UART2 — is modelled faithfully.