Sinclair Scientific

Embedding

There is no build step. Ken Shirriff's simulator is a set of plain-global JavaScript modules; we vendor five of them (dropping his jQuery-based UI) and load them in order:

// data model, CPU, 7-segment display, operation masks, and the ROM
<script src="model.js"></script>               // Model: registers A/B/C, flags, D-scan, address
<script src="cpu.js"></script>                 // Cpu.step(): execute one 11-bit instruction
<script src="display.js"></script>             // Display: render register A to the LED panel
<script src="masks_sinclair.js"></script>      // masks[]: the 16 field masks / constants
<script src="sourceCode_sinclair.js"></script> // objectCode[]: 320 words of TMS0805 microcode

Boot. Construct the model, CPU and display, then run your own loop so the debugger can pause and step it. The display needs no jQuery — it only reads elem[0], so a one-element array wrapping the <canvas> is enough:

var model = new Model(objectCode, 1 /* sinclair */);
var cpu = new Cpu(model, masks, 1);
var display = new Display([canvas], model, 1);
(function loop(){
  for (var i = 0; i < 400; i++) micro();  // one instruction each; scan keys; check bp/wp
  display.update();
  requestAnimationFrame(loop);
})();

The machine is plain objects — no wasm heap — so the debugger reaches everything directly:

Debugger integration

The debugger plug-in (sinclair-scientific-debug.js) reads window.EMU_BOOT and calls EmuKit.defineMachine. Because the whole machine is ordinary JavaScript, single-stepping is just cpu.step(), and each register digit is read and written straight off model.a/.b/.c.

The register panel exposes the address register, the condition and key-strobe flags, the D-state, the two flag registers (packed 11 bits each) and every BCD digit of A, B and C as its own 4-bit box — so you can watch the serial digit-by-digit arithmetic that makes this chip so unusual. A side-effect-free register-file chip (55 nibbles) and the program ROM back the hex and disassembly views.

Breakpoints are a host-side Set the loop checks against model.address at every instruction boundary. Watchpoints snapshot the watched register-file nibbles before each instruction and pause when one changes — a true write-watchpoint over the chip's registers, which are the only writable memory it has.

A new tms0800 disassembler (/debugger/src/cpus/tms0800.js) decodes the 11-bit instruction word: a 2-bit class field, a 5-bit opcode and a low 4-bit mask/constant index (or a 9-bit branch target). Because the shared disasm view truncates the reader to 8 bits, the decoder reads the true 11-bit word through EMU_BOOT.peek, exactly as the LMC decoder does for its 3-digit words.

Architecture

The Sinclair Scientific (1974) undercut the $395 HP-35 by squeezing sine, cosine, tangent, their inverses, log and exponent into a chip meant only for four-function arithmetic:

• TMS0805 — a member of TI's TMS0800 calculator-chip series: a 4-bit serial processor with just three 11-digit BCD registers (A, B, C), two 11-bit flag registers, a 9-bit address register and a 320-word ROM. There is no subroutine call and no scratch RAM.
• Instruction word — 11 bits. A class field picks register-ALU ops (add/subtract/compare/shift/copy under a field mask), flag ops, key-scan/branch ops or conditional branches. Arithmetic is done one BCD digit at a time, gated by a mask so a single register can hold several packed quantities.
• Display — a permuted 5-digit mantissa plus 2-digit exponent driven straight from register A; the reverse-Polish entry and constants are all done in the microcode.
• The famous trick: with no room for the constants and precision of the HP-35, Sinclair's team used clever fixed-point CORDIC-style approximations, trading accuracy and speed for a program that fits in 320 instructions. Ken Shirriff reverse-engineered the ROM and masks from the die photograph; this simulator runs that exact recovered microcode.