BBC micro:bit v2

Embedding

This is a two-layer stack: a real ARM CPU core underneath, and a from-scratch nRF52833 + micro:bit V2 board on top. It loads real Cortex-M4 flash images and runs them on the actual on-chip peripherals — original bare-metal programs that drive the LED matrix and, new for v2, the on-board speaker through the real nRF52 PWM peripheral.

• The CPU. cortex-m7.js executes Thumb. The real chip is a Cortex-M4F (ARMv7E-M); this shared core is the same ARMv7-M family (it carries the full exception model + FPU), so it runs the M4 image unchanged.
• Real reset. The image is a real flash image with the ARM vector table at 0x00000000: on reset the board loads SP from word 0 and PC from word 1, exactly like the silicon.
• The board, in JavaScript. microbit-v2-board.js maps FLASH/RAM/APB and the two GPIO ports (P0 + P1) at their real nRF52 addresses, decodes the matrix GPIO into the 5x5 display, feeds the buttons on their GPIO pins, answers the accelerometer's TWI reads, and turns the PWM speaker writes into audio.

Debugger integration

microbit-v2-debug.js reads window.EMU_BOOT and hands the shared debugger a genuine ARM Cortex-M4 machine — the same core the program runs on, exposed instruction-accurately.

• Registers. registers() reads r0-r12, SP, LR, PC, xPSR and the APSR flags N/Z/C/V live each refresh, plus the FPU single-precision registers s0-s31 (their raw 32-bit bit pattern). r0-r15 and the flags each have a set() that writes straight back into the core's register file.
• Disassembly. FLASH is decoded with the shared cortex-m7 decoder (the Thumb-2 disassembler), so the code window shows real ARM mnemonics at the real reset address 0x00000000.
• Single-step. Step calls transport.stepInsn, which advances the core exactly one Thumb instruction; PC and the registers update after each step.
• Breakpoints & watchpoints. Execution breakpoints are a PC set the run-loop checks before each instruction; write watchpoints wrap the board's memory-write path and pause when a watched address is written. Both are real.
• Memory map. Four chips read the real address space side-effect-free: FLASH (program, disassembled), RAM (0x20000000), the GPIO ports (0x50000000 — P0 at +0x000, P1 at +0x300; watch OUT/DIR/IN change as the matrix scans), and the APB peripheral block (0x40000000 — CLOCK, TWI0, TIMER, RNG, and PWM0 the speaker).

Architecture

The BBC micro:bit V2 upgrades v1 to a Nordic nRF52833 — a 64 MHz ARM Cortex-M4F (with FPU) and 512 KB flash / 128 KB RAM, up from v1's 16 MHz Cortex-M0. On board: a 5x5 LED matrix, buttons A and B, an LSM303AGR accelerometer + magnetometer on I2C, and — the headline addition — an on-board speaker, a MEMS microphone, and a capacitive touch logo.

• The 5x5 display is a true 5x5 matrix (v1's odd 3x9 multiplex is gone). Rows ROW1..ROW5 = P0.21/22/15/24/19 (driven high, the source); columns COL1..COL5 = P0.28/11/31, P1.05, P0.30 (driven low, the sink — note COL4 is on the second GPIO port). The board reads the GPIO the program drives and integrates the scan over each frame into the logical 25-LED image.
• Buttons A = P0.14, B = P0.23, active-low with a pull-up.
• Accelerometer — an LSM303AGR at I2C address 0x19 on TWI0 (SCL P0.08, SDA P0.16). It is high-level-emulated: real nRF52 TWI transactions return WHO_AM_I = 0x33 and the settable X/Y/Z from the on-screen tilt / shake controls.
• The SPEAKER (new). The on-board magnetic speaker is on P0.00, driven by the nRF52 PWM peripheral (PWM0 @ 0x4001C000). A tone is produced by setting COUNTERTOP = (16 MHz>>PRESCALER) / frequency with a 50%-duty sample — the PWM output is a square wave AT the note frequency, which the speaker plays. The board latches those PWM registers on TASKS_SEQSTART and reproduces that exact square wave to the shared audio sink. See the Sound notes below.
• Timing/entropy. CLOCK, the TIMERs and RTCs, the RNG, plus FICR and NVMC are implemented, with the nRF52 IRQ lines wired into the core's NVIC. RADIO / BLE are present but stubbed (no real RF); the microphone and touch logo are not wired.
• Content. Four original CC0 bare-metal programs written for emulators.org and compiled with arm-none-eabi-gcc for the Cortex-M4: a melody-plus-heart sound demo (the default), a beeping flashing heart, an A/B faces-and-tones program, and an accelerometer tilt dot. No proprietary firmware is used.

Sound

Pattern S (authored synthesis) driven by the real PWM peripheral. The micro:bit V2's new on-board speaker sits on P0.00 and is driven by the nRF52 PWM0 peripheral. There is no separate "sound chip": a musical tone is literally a PWM square wave whose frequency equals the note. The programs set it up the real way — PRESCALER = 4 (1 MHz PWM clock), COUNTERTOP = 1,000,000 / note_freq, and a single 50%-duty EasyDMA sample — then fire TASKS_SEQSTART[0].

The board's pwmWrite hook (in microbit-v2-board.js, APB peripheral id 0x1C) latches those registers on SEQSTART: it reads COUNTERTOP + PRESCALER to recover freq = (16 MHz>>PRESCALER) / COUNTERTOP, and the compare sample from RAM (via SEQ[0].PTR) to recover the duty. TASKS_STOP silences it. Each video frame genAudioFrame() renders that exact square wave with a persistent phase accumulator (so notes don't click), duplicated to L+R, at exactly Math.round(EmuAudio.sampleRate/60) interleaved-stereo Int16 samples, and pushAudio() pushes it to the shared EmuAudio sink. The pitch is correct because the frequency comes straight from the emulated COUNTERTOP, not a fixed table.

The transport exposes the standard mute contract — setMute/isMuted delegate to EmuAudio — and it starts muted (browsers block audio before a gesture); the shell's Sound button unmutes from a real click. The default program plays a recognisable melody so unmuting is immediately audible.