Manchester Mark 1

Embedding

The Manchester Mark 1 here is authored from scratch in one small file, mark1.js. It is a plain global — MARK1.create(canvas) returns a machine object whose whole state is ordinary JavaScript (40-bit store words and the 80-bit accumulator are BigInt), so the debugger reaches straight into it with no wasm heap or hidden loop. A tiny two-pass assembler, MARK1.assemble, turns a readable listing into the store map.

Boot. Create the machine on a <canvas>, assemble and load a program, then run your own loop built on mark1.step() (execute exactly one instruction):

var mk1 = MARK1.create(canvas);
var prog = MARK1.assemble([
  { label: 'loop', f: 'LDP', a: 'prod' },   // A := prod
  { f: 'MUL', a: 'kval' },                // A := A × k   (hardware multiplier)
  { f: 'PRD' }, { f: 'NL' },              // teleprinter: print A, newline
  /* … */
]);
mk1.load(prog);
(function loop(){
  var r = mk1.step();               // 'ok' | 'stop'
  mk1.render();
  if (r !== 'stop') requestAnimationFrame(loop);
})();

The machine is plain fields. Everything the debugger needs is live on the object:

Debugger integration

The plug-in manchester-mark-1-debug.js calls EmuKit.defineMachine against the live core published on window.EMU_BOOT. Because the whole machine is ordinary JavaScript, no wrapping is needed:

• Registers. The 80-bit accumulator is a BigInt, but the shared register view edits 32 bits at a time, so it is exposed as two fields A-lo / A-hi (reconstructed on write-back). Alongside are CI, PI, the current tube PAGE, the seven index registers B1–B7, and the STOP flag. Each set() writes straight back into the core and re-renders.
• Memory. One chip, the 128-line store, read side-effect-free through peek. The disasm view runs the new mark1 decoder; bits shows the raw 40-bit dot pattern; hex shows bytes.
• The decoder. debugger/src/cpus/mark1.js registers decoder mark1. It reads the true 40-bit word off the live machine (the shared views hand it a byte-masked reader) and splits the low 20 bits into function / B-line / address, printing e.g. MUL 20 or LDP 34 B1. A line with any high bit set is data and prints as .line <value>.
• Transport. The boot owns the run loop, so pause/resume, single-instruction step, execution breakpoints (a host-side Set of line numbers checked before each step()) and write watchpoints (checked inside onWrite) all work with no change to the core.

Architecture

The Manchester Mark 1 ran at the University of Manchester in 1949, growing out of the SSEM "Baby" of 1948. It kept the Baby's Williams-Kilburn tube store and single accumulator but added the features that made it a working computer — several of them world firsts. This authored core reproduces those additions over the Baby:

• A wider 40-bit word (the Baby's was 32), held on the Williams-Kilburn tube in pages of 32 lines. This core has a 128-line store (four pages) shown one page at a time, backed by a magnetic drum that the drum-transfer instructions move a 32-line track at a time.
• Index registers — the "B-lines" (B-tube), a Mark 1 world first. A 3-bit B field in every instruction names a B-line whose contents are added to the address before the operand is fetched (B0 is hard-wired 0). This is what "modifying instructions" means and is why loops over tables became possible.
• An 80-bit double-length accumulator and a hardware multiplier (MUL) — the Baby could only subtract.
• Teleprinter I/O: characters are printed in the 5-bit Manchester teleprinter code (plus a decimal-print convenience so results are legible), onto the paper shown at the right.

An instruction is 20 bits: a 10-bit address S (bits 0–9), a 3-bit B-line (bits 10–12) and a 7-bit function (bits 13–19). The effective address is E = S + B[b].

The shared mark1 decoder turns each word back into these mnemonics in the disassembly, so you can watch the fetch-decode-execute cycle — and the multiplier and the index registers at work — one instruction at a time. (Authored simplification: the real Mark 1 packed two 20-bit instructions per 40-bit line; this core runs one per line so CI, breakpoints and the disassembly all address by line.)