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TRS-80 CoCo 3 Emulator (coco3)

2026 Open source Online

coco3 is a compact, fully-inspectable Tandy Color Computer 3 assembled in this repository around the JavaScript Motorola 6809 core from JSVecX. It adds two MC6821 PIAs and a compact GIME — the CoCo 3's gate array, with an 8 KB-granular memory-management unit over 512 KB, the ROM/RAM map and the 60 Hz vertical-border interrupt — and boots the 32 KB Super Extended Color BASIC ROM straight to the green "OK" prompt with no media.

It runs entirely in the browser and plugs into the shared emulators.org debugger: single-step the 6809, read and write the A B D X Y U S DP PC CC registers, inspect memory through the live GIME MMU bank map, and set execution breakpoints and write watchpoints. A physical and an on-screen CoCo 3 keyboard drive the real key matrix.

Runs on: Web browser

TRS-80 CoCo 3 Online Emulator

Play TRS-80 CoCo 3 using JavaScript directly in your browser.

Configurations

ConfigurationEmulatorMachineOSLegal
Super Extended Color BASICTRS-80 CoCo 3TRS-80 CoCo 3greyOpen ⛶

Machines emulated

Chips

Notes

Embedding

There is no ready-made pure-JavaScript Color Computer 3, so this build reuses the proven JavaScript Motorola 6809 core from JSVecX (e6809.js, itself a port of Valavan Manohararajah's e6809.c) and wraps a small CoCo 3 around it. The CoCo 3 is the enhanced Color Computer: a 68B09E, two MC6821 PIAs and a single "GIME" gate array that replaces the CoCo 1/2's SAM + MC6847 VDG and adds an 8 KB-granular memory-management unit over up to 512 KB, hi-res video and its own interrupt controller — while still booting in a CoCo-compatible 32x16 green text mode.

Boot. Give the 6809 a bus object with read8 / write8, map the 32 KB Super Extended Color BASIC ROM at $8000, reset it (the reset vector at $FFFE reads $8C1B from the top of the ROM) and drive it from a loop you own — one 60 Hz field is ~29,830 CPU clocks at 1.79 MHz:

var cpu = new e6809();
cpu.init(machine);              // machine.read8 / machine.write8 = the bus (GIME-translated)
cpu.e6809_reset();             // PC <- read16($FFFE) = $8C1B (ROM)
(function field(){
  gime.irqSt |= 0x08;          // 60 Hz vertical-border sync -> GIME IRQ (BASIC's timer)
  for (var c = 0; c < 29830; )
    c += cpu.e6809_sstep(irqLine(), firqLine());  // one instruction, returns its cycles
  render(); requestAnimationFrame(field);
})();

The machine is plain objects. Everything the debugger needs is a field or method — there is no wasm heap to reach into:

MemberKindWhat it does
cpu.e6809_sstep(irq, firq)methodExecute exactly one 6809 instruction with the current IRQ / FIRQ lines; returns its cycle count. The single-step primitive.
cpu.reg_a / reg_b / reg_dp / reg_cc / reg_pcfieldThe 8- and 16-bit registers as numbers; reg_x/y/u/s are boxed (.value holds the 16-bit register).
EMU_BOOT.phys(a)methodTranslate a 16-bit CPU address to a 512 KB physical RAM index through the live GIME MMU bank map — the debugger reads memory exactly as the CPU sees it.
machine.read8(a) / write8(a,v)methodThe CPU bus: MMU-mapped RAM, the ROM overlay (governed by the SAM TY bit), the two PIAs and the GIME register file.
physRam (512K) / rom (32K) / mmu (16) / gimefieldRaw byte arrays and the GIME state — readable and pokeable live.

Because the CPU, bus and RAM are ordinary JavaScript, the debugger single-steps with e6809_sstep, reads and writes registers straight off cpu, and implements breakpoints and watchpoints as host-side checks around the loop — no changes to the reused core.

Debugger integration

The plug-in (coco3-debug.js) reads the live machine from window.EMU_BOOT and hands the shared framework a description of the CoCo 3. Nothing is patched into the emulator; the whole surface is ordinary field access.

  • Registers are read straight off cpu each refresh — A B D X Y U S DP PC CC plus the E F H I N Z V C condition flags decoded from reg_cc — and written back the same way. Single-step and watch them change.
  • Memory is three chips: a side-effect-free 64K CPU bus translated through the GIME MMU (its bank map turns each 16-bit CPU address into one of the 512K physical bytes, exactly as the CPU sees it), the raw 512K physical RAM, and the 32K ROM. The $FF00–$FFDF I/O window is skipped so an auto-refreshing hex view never clears a PIA or GIME interrupt flag. Disassembly uses the shared m6809 decoder.
  • Single step is e6809_sstep — one 6809 instruction with its correct IRQ handling.
  • Breakpoints are host-side: with any set, the loop steps one instruction at a time and compares cpu.reg_pc before each. Watchpoints wrap the bus write path and pause on a write to a watched address.
  • Input is the real CoCo key matrix — the physical keyboard maps each character to a matrix cell, and an on-screen CoCo 3 keyboard drives the same cells for touch.

What needed care. The GIME is the CoCo 3's interrupt controller: the 60 Hz vertical-border sync is latched as the sole IRQ source and cleared when the ROM's handler reads $FF92. Raising the legacy PIA0 CB1 field-sync flag as well would leave a second, never-acked interrupt pending and spin the boot ROM forever — so only the GIME line is driven. The ROM/RAM split at $8000–$FFFF follows the SAM "TY" bit ($FFDE/$FFDF) that the reset code toggles, not the INIT0 map bits.

Architecture

The Color Computer 3 is a clean 6809 machine with one big gate array, and this build keeps each block as its own object:

  • e6809 — the Motorola 6809 core (reused from JSVecX), single-stepped by e6809_sstep.
  • GIME MMU — eight 8 KB CPU segments map onto any of 64 physical banks (512 KB) via $FFA0–$FFAF; with the MMU disabled (the reset state) the CPU sees the top 64 KB, CoCo-compatible. read8/write8 translate every access through this map.
  • ROM map — the 32 KB internal ROM (Super Extended Color BASIC 2.0 + Extended Color BASIC 2.0 + Color BASIC 1.2) overlays $8000–$FEFF when the SAM "TY" bit is 0, with the 6809 vectors at the top; an optional Disk BASIC cartridge sits at $C000–$DFFF.
  • MC6821 PIAspia0 reads the 8×7 keyboard matrix (columns out on port B, rows in on port A); pia1 carries the sound DAC and cassette lines.
  • Video — the CoCo-compatible 32x16 alphanumeric screen is fetched from logical $0400 (through the MMU) and drawn to the canvas as black-on-green, the CoCo 3's signature boot screen. Each byte is a 6-bit character code with an inverse bit and a semigraphics bit.

With no cartridge and no disk, the reset routine programs the GIME, sizes the RAM, prints its 1986 Tandy / Microsoft / Microware copyright banner and drops to OK — a complete, inspectable machine that boots straight to BASIC.