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STM32F103 Blue Pill

2015 Open source · CC0 On-board only Online

STM32F103 Blue Pill is the ubiquitous $2 hobbyist board — an STMicroelectronics STM32F103C8 (a 72 MHz ARM Cortex-M3, ARMv7-M without an FPU, with 64 KB flash and 20 KB SRAM) on a small blue PCB — emulated from scratch in the browser on this site's shared ARM core. It runs REAL compiled firmware: a flat flash image with the ARM vector table at 0x08000000 boots exactly as on silicon (SP and PC loaded from the table), then drives the real STM32F103 registers. The two on-board peripherals a bare Blue Pill actually has are shown — the on-board LED on PC13 (active-low) and a USART1 serial console — with nothing invented: no breadboard, no fake audio (a bare Blue Pill has no speaker, so it is honestly silent). Because the whole chip is ordinary JavaScript, it plugs into this site's shared debugger: the real Thumb-2 disassembler, live r0-r15 / xPSR / N-Z-C-V, side-effect-free FLASH / SRAM / peripheral memory at the real addresses, single-instruction step, execution breakpoints and write-watchpoints.

STM32F103C8 at STMicroelectronics ↗

Runs on: Web browser

STM32F103 Blue Pill Online Emulator

Play STM32F103 Blue Pill using JavaScript directly in your browser.

Configurations

ConfigurationEmulatorMachineOSLegal
Blink PC13 (on-board LED)STM32F103 Blue PillSTM32F103 Blue PillopenOpen ⛶
Timer Blink (TIM2)STM32F103 Blue PillSTM32F103 Blue PillopenOpen ⛶
USART HelloSTM32F103 Blue PillSTM32F103 Blue PillopenOpen ⛶
USART CounterSTM32F103 Blue PillSTM32F103 Blue PillopenOpen ⛶

Chips

Notes

Embedding

This is a two-layer stack: a real ARM CPU core underneath, and a from-scratch STM32F103 SoC + Blue Pill board on top. It loads real Cortex-M3 flash images and runs them on the actual on-chip peripherals — RCC clock gating, the GPIO ports, USART1 and the TIM2/TIM3 timers — at their real addresses. The firmware is genuine compiled machine code, not a shim.

  • The CPU. cortex-m7.js executes Thumb-2. The real chip is a Cortex-M3 (ARMv7-M without the FPU); this core is ARMv7-M, so it runs the M3 image unchanged — an M3 image simply never emits VFP.
  • Real reset. The image is a real flash image with the ARM vector table at 0x08000000: on reset the board loads SP from word 0 and PC from word 1, exactly like the silicon.
  • The board, in JavaScript. bluepill-board.js maps FLASH/SRAM/peripherals at their real STM32F103 addresses, answers the RCC clock-ready bits the firmware spins on, folds GPIO BSRR/BRR into ODR, captures every byte written to USART1->DR into the serial console, and counts TIM2/TIM3.
PieceKindWhat it does
BluePill.create(canvas)factoryBuild the ARM core + the STM32F103 memory map + peripherals.
load(bytes) / reset()methodCopy the flat image into FLASH; reset loads SP/PC from the vector table at 0x08000000.
runFrame()methodStep ~60k instructions and advance the TIM2/TIM3 timers.
ledOn() / getSerial()methodThe on-board LED (PC13, active-low) state and the accumulated USART1 output.
present()methodDraw the on-board LED indicator and the serial console to the canvas.

Debugger integration

bluepill-debug.js reads window.EMU_BOOT and hands the shared debugger a genuine ARM Cortex-M3 machine — the same core the firmware runs on, exposed instruction-accurately.

  • Registers. registers() reads r0-r12, SP, LR, PC, xPSR and the APSR flags N/Z/C/V live each refresh; each has a set() that writes straight back into the core's register file.
  • Disassembly. FLASH is decoded with the shared cortex-m7 decoder (the Thumb-2 disassembler), so the code window shows real ARM mnemonics at the real reset address 0x08000000.
  • Single-step. Step calls transport.stepInsn, which advances the core exactly one Thumb instruction; PC and the registers update after each step. You can watch the reset handler copy .data to SRAM and fall into main().
  • Breakpoints & watchpoints. Execution breakpoints are a PC set the run-loop checks before each instruction; write watchpoints wrap the board's memory-write path and pause when a watched address is written (e.g. GPIOC->ODR at 0x4001100C or USART1->DR at 0x40013804). Both are real.
  • Memory map. Three chips read the real address space side-effect-free: FLASH (program, disassembled, 0x08000000), SRAM (0x20000000), and the peripheral block (0x40000000 — RCC, GPIOA-C, USART1, TIM2/3). Reading the dynamic registers (USART1 SR, GPIO IDR) is side-effect-free.

Architecture

The STM32F103 "Blue Pill" is the ubiquitous hobbyist board: a $2 STMicroelectronics STM32F103C8 — a 72 MHz ARM Cortex-M3 (ARMv7-M, no FPU) with 64 KB flash and 20 KB SRAM — on a small blue PCB with an on-board LED and a USB connector. This build models the chip from scratch on the shared ARM core.

  • Cortex-M3 CPU — runs the real Thumb-2 image. FLASH is at 0x08000000 (the vector table: word0 = initial SP, word1 = reset handler), SRAM at 0x20000000, all peripherals at 0x40000000. On reset SP and PC are loaded from the vector table, exactly as on silicon.
  • RCC (Reset & Clock Control, 0x40021000) — the firmware gates each peripheral's clock through APB1ENR/APB2ENR before touching it, and spins on the clock-ready bits (HSERDY, PLLRDY); the board answers those bits so real clock-setup code proceeds.
  • GPIO ports A/B/C — the STM32 CRL/CRH pin-config, ODR output data and the atomic BSRR/BRR set/reset registers. The on-board LED is on PC13 and is active-low: the board lights it when GPIOC->ODR bit 13 is driven low.
  • USART1 (0x40013800) — the serial port. SR keeps TXE/TC asserted so polling transmit code runs, and every byte written to DR is captured onto the on-screen serial console (TX on PA9).
  • TIM2 / TIM3 — general-purpose 16-bit timers with prescaler (PSC), auto-reload (ARR), counter (CNT) and the update flag (SR.UIF), advanced by executed instructions; the Timer Blink program times the LED off TIM2. SysTick and the NVIC come from the core.
  • Content. Four original CC0 bare-metal C programs compiled with clang for thumbv7m: Blink PC13, Timer Blink (TIM2), USART Hello and USART Counter. No proprietary firmware is used.
  • Honest limits. A bare Blue Pill has no on-board audio (no speaker/DAC), so this emulator is genuinely silent with no sound path. It also has no user-input peripheral wired to the firmware (the LED is an output and the serial console is TX-only), so there is no input pad. USB, ADC, SPI/I2C and the interrupt-driven paths of the untouched peripherals are not modelled — the bundled firmware polls.