Chips › Sound & audio › Wavetable & sample › Sony S-DSP (SPC700)
Sony S-DSP (SPC700)
1990
Sony's digital signal processor in the SNES audio subsystem, mixing eight ADPCM sample channels with hardware echo and effects.
Machines
Emulators
| Emulator | Type | License | Site |
|---|---|---|---|
| Mesen | downloadable | GPL-3.0 | Website ↗ |
| NESbox | online | MIT | Website ↗ |
| SNES (LakeSnes) | online | MIT | Website ↗ |
| Snes9x | downloadable | Non-commercial | Website ↗ |
| ZSNES | downloadable | GPL-2.0 | Website ↗ |
| ares | downloadable | ISC | Website ↗ |
| bsnes | downloadable | GPL-3.0 | Website ↗ |
| higan | downloadable | GPL-3.0 | Website ↗ |
| nemulator | downloadable | Freeware | Website ↗ |
| no$sns | downloadable | Freeware | Website ↗ |
Reference & documentation
External technical references for programming Sony S-DSP (SPC700) and for writing emulators.
| Resource | Type | Notes |
|---|---|---|
| Fullsnes - Nocash SNES Specs ↗ | Datasheet | Exhaustive SPC700/S-DSP hardware, ports, timing reference |
| Bit Rate Reduction (BRR) - Super Famicom Dev Wiki ↗ | Format | BRR block layout, header bits, decode filters |
| BRR Samples - SNESdev Wiki ↗ | Format | BRR decoding, filters, loop alignment, Gaussian playback |
| SPC-700 Instruction Set - SNESdev Wiki ↗ | Instruction set | Full opcode table with cycles, flags, mnemonics |
| S-DSP Registers - SNESdev Wiki ↗ | Memory map | Every DSP register: voices, echo, ADSR, timing errata |
| SPC700 Reference - Super Famicom Dev Wiki ↗ | Programming | Architecture, memory map, instruction and DSP programming guide |
| S-SMP - SNESdev Wiki ↗ | Reference | Sound subsystem: CPU, DSP, timers, IPL, ports |
| SingleStepTests ProcessorTests (6502/65C02) ↗ | Test suite | Per-opcode JSON tests with cycle-level bus activity |
| snesbrr - BRR encoder/decoder ↗ | Tool | PCM to/from BRR codec for S-DSP |