ChipsProcessorsXtensa family › Espressif ESP32-S3

Espressif ESP32-S3

2020

The ESP32-S3 is Espressif's dual-core WiFi and Bluetooth LE microcontroller, built around two 32-bit Tensilica Xtensa LX7 cores at up to 240MHz. The LX7 keeps the windowed Xtensa register file, the variable-length 24-bit and 16-bit (density) encodings, L32R literal loads and the zero-overhead loop, and adds vector and DSP extensions used for AI and signal work. It integrates SRAM, cache-mapped external SPI flash, a rich GPIO matrix, UARTs, USB and the WiFi and BLE radios. Here it runs real bare-metal firmware on a from-scratch Xtensa LX7 interpreter, sharing the Xtensa core with the ESP32 (core0 only; WiFi and BLE stubbed).

Machines

Emulators

EmulatorTypeLicenseSite
ESP32-S3onlineCC0 firmware · from-scratch coreWebsite ↗