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Amstrad gate array

1984

Amstrad's custom gate array handling video timing, memory paging and interrupts in the CPC home computers.

Machines

Amstrad CPC 464

Amstrad CPC 6128

Amstrad CPC 664

Amstrad GX4000

Operating systems

CP/M 2.2

CP/M 3.0 (Plus)

Emulators

EmulatorTypeLicenseSite
ACE-DLdownloadableFreewareWebsite ↗
ArnolddownloadableFreewareWebsite ↗
CPCBoxonlineFreewareWebsite ↗
CPCemudownloadableFreewareWebsite ↗
Caprice32downloadableGPL-2.0Website ↗
JavaCPCdownloadableFreewareWebsite ↗
RolandonlineFreewareWebsite ↗
SugarboxdownloadableGPL-3.0Website ↗
WinAPEdownloadableFreewareWebsite ↗
XcpcdownloadableGPL-2.0Website ↗

Reference & documentation

External technical references for programming Amstrad gate array and for writing emulators.

ResourceTypeNotes
Gate Array interrupt counter - Grimware ↗Interrupt list6-bit HSync/VSync counter, 300Hz interrupt generation
Gate Array ROM/RAM banking - Grimware ↗Memory mapRMR/MMR ROM paging and RAM banking config
Gate Array and ASIC Pin-Outs - CPCWiki ↗PinoutFull pinouts for 40007/40008/40010 and ASIC
Amstrad CPC KiCad Symbols - Bread80 ↗PinoutKiCad pinout symbols for 40007/40008/40010 gate arrays
Amstrad CPC Gate-Array (cpctech) ↗ProgrammingRegister programming, modes, ROM paging, asm examples
Notes on Amstrad CPC CRTC and Gate Array ↗ProgrammingVideo timing, memory contention, mode pixel formats
Gate Array - Grimware Documentation ↗ReferenceDefinitive technical reference: PENR/INKR/RMR/MMR registers, timing
Gate Array - CPCWiki ↗ReferenceVersions 40007/40008/40010, functions, quirks overview
AMSGateArray - decapped Verilog & schematics ↗SchematicDecapped 40010/40007 schematics, CPLD Verilog reimplementation
am40010.h - floooh/chips emulator ↗SourceCycle-accurate C 40010 gate array emulator source
AMSGateArray Verilog core ↗SourceVerilog 40010 model validated on real hardware