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Sony Allegrex
2004
Sony's MIPS-based 32-bit CPU that powered the PlayStation Portable handheld console.
Machines
Emulators
| Emulator | Type | License | Site |
|---|---|---|---|
| JPCSP | downloadable | GPL-3.0 | Website ↗ |
| PPSSPP | both | GPL-2.0 | Website ↗ |
Reference & documentation
External technical references for programming Sony Allegrex and for writing emulators.
| Resource | Type | Notes |
|---|---|---|
| PSPTEK Hardware Reference ↗ | Datasheet | Register-level hardware map of Allegrex, ME, KIRK, GE |
| PSP VFPU Documentation ↗ | Instruction set | Verified VFPU opcode reference: encoding, pipeline, prefixes, pseudocode |
| Allegrex CPU (upspd wiki) ↗ | Instruction set | Sony custom opcodes: HALT, MFIC, MTIC, register conventions |
| PSP Memory Map (upspd wiki) ↗ | Memory map | Physical/virtual segments, scratchpad, VRAM, kernel/user partitions |
| YAPSPD Chapter 4: CPU ↗ | Programming | Registers, COP0/1/2, cache coherency, VFPU programming details |
| The Naked PSP (TyRaNiD) ↗ | Programming | Low-level PSP: toolchain, kernel, threading, modules, debugging |
| PSP Hardware Registers (upspd wiki) ↗ | Reference | Memory-mapped I/O: memory protection, DMACPlus, LCDC, bit fields |
| PPSSPP Allegrex Overview ↗ | Reference | Emulator-author overview: no MMU, cache/GPU pitfalls, VFPU fetch |
| pspdev/vfpu-docs repository ↗ | Source | Machine-readable YAML: encoding, operands, prefixes, functional spec |
| pspdev/vfpu-docs hardware tests ↗ | Test suite | Auto-generated tests validating VFPU behaviour on real hardware |
| pspdev/pspsdk ↗ | Tool | Open-source SDK, MIPS toolchain, build tools, hardware libs |