Chips › I/O & support › Custom & glue logic › Acorn IOC

Acorn IOC

1987

Acorn's Input/Output Controller gate array, handling interrupts, timers and peripheral I/O in the Archimedes computers.

Machines

Acorn A3000

Acorn A310

Acorn A440

Acorn Archimedes

Operating systems

RISC OS 2

RISC OS 3.1

Reference & documentation

External technical references for programming Acorn IOC and for writing emulators.

ResourceTypeNotes
Acorn RISC Machine Family Data Manual (VLSI) - VL86C410 IOC ↗DatasheetOfficial VL86C410 IOC datasheet: registers, timers, timing
RISC OS PRM - Interrupts and handling them ↗Interrupt listIOC IRQ/FIQ sources and device vector numbers
RISC OS Open - Archimedes Hardware ↗Memory mapIOC register addresses and Archimedes hardware layout
Acorn RISC Machine Family Data Manual (VLSI) - VL86C410 IOC ↗PinoutIOC package pinout and full signal descriptions
RISC OS PRM - ARM Hardware ↗ProgrammingIOC functions, counters, control port programming overview
IOC - Arc Wiki ↗ReferenceTechnical wiki: timers, interrupts, address banks, keyboard
Acorn technical documents (chiark/theom) ↗ReferenceIndex of original Acorn chipset datasheets
Acorn A500/R200 Series Service Manual ↗SchematicBoard schematics showing IOC connections and buses
ArcEm - Archimedes emulator (source) ↗SourceC emulator source implementing IOC, MEMC, VIDC
Arculator - Acorn Archimedes emulator ↗ToolAccurate Archimedes emulator for conformance testing