Chips › I/O & support › Parallel I/O (PIA/VIA/PPI) › MOS 6520 PIA
MOS 6520 PIA
1977
MOS Technology's Peripheral Interface Adapter, providing two 8-bit parallel I/O ports, a clone of Motorola's 6821 PIA.
Reference & documentation
External technical references for programming MOS 6520 PIA and for writing emulators.
| Resource | Type | Notes |
|---|---|---|
| MOS 6520 PIA Datasheet (MOS Technology) ↗ | Datasheet | Original MOS Technology 6520 PIA datasheet |
| Rockwell R6520 PIA Datasheet (rev 4) ↗ | Datasheet | Full 12-page datasheet, control-register bit definitions |
| WDC W65C21S PIA Datasheet ↗ | Datasheet | Modern register-compatible PIA, detailed timing specs |
| 6520 PIA Interrupt & Control-Line Behavior ↗ | Interrupt list | CA1/CA2/CB1/CB2 interrupt flags and handshake modes |
| Commodore PET Programming Model (6520 map) ↗ | Memory map | 6520 register addresses mapped in real system |
| MOS 6520 PIA Pinout & Signals ↗ | Pinout | 40-pin DIP pinout and signal descriptions |
| Commodore PET I/O: 6520 PIA Registers ↗ | Programming | Control-register bits, DDR, and handshake modes explained |
| Rockwell 6520 PIA Datasheet (Internet Archive) ↗ | Reference | Datasheet with OCR full-text and multiple formats |
| Peripheral Interface Adapter (Wikipedia) ↗ | Reference | PIA overview: ports, control lines, chip family |
| WDC W65C21 PIA Product Page ↗ | Tool | In-production 6520 replacement part and resources |