Chips › I/O & support › Serial & UART › 16550 UART
16550 UART
1987
Enhanced National Semiconductor UART with a 16-byte FIFO buffer, the standard serial-port controller in PC-compatibles from the late 1980s.
Reference & documentation
External technical references for programming 16550 UART and for writing emulators.
| Resource | Type | Notes |
|---|---|---|
| PC16550D Datasheet (National Semiconductor) ↗ | Datasheet | Canonical UART datasheet: registers, FIFO modes, timing |
| 16550 UART Register Map (Open SoC Debug) ↗ | Memory map | Register offsets, reset values, access types |
| PC16550D Datasheet - Pinout & Packages ↗ | Pinout | DIP/PLCC pin assignments and signal descriptions |
| AN-491: NS16550A Design & Application Considerations ↗ | Programming | FIFO-mode driver design, trigger levels, timeouts |
| OSDev Wiki: Serial Ports ↗ | Programming | Practical 16550 init, IO ports, interrupts |
| Serial UART In-Depth Tutorial (Lammert Bies) ↗ | Reference | Every register and bit documented in tables |
| 16550 UART - Wikipedia ↗ | Reference | History, variants, FIFO bug, feature overview |
| Core16550 IP Handbook (Microchip) ↗ | Reference | 16550-compatible soft-core register descriptions |
| rust-osdev/uart_16550 driver ↗ | Source | Clean no_std reference driver, port and MMIO |